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===Memory Map for dsPIC33FJ256GP506===
 
===Memory Map for dsPIC33FJ256GP506===
 
{| border="1" cellspacing="0" cellpadding="5"
 
{| border="1" cellspacing="0" cellpadding="5"
|+  
+
|+ Table 11.1 Memory Location
 
! Type !! Start Address !! End Address !! Size
 
! Type !! Start Address !! End Address !! Size
 
|-valign="top"
 
|-valign="top"
| Flash || 0x000000 ||0x02ABFF || 171K<sup>[1]</sup>
+
| Flash || 0x000000 ||0x0157FF || 86K<sup>[1]</sup>
 
|-valign="top"
 
|-valign="top"
 
| +--Flash: Reset Vector || 0x000000 ||0x000003 || 4
 
| +--Flash: Reset Vector || 0x000000 ||0x000003 || 4
Line 16: Line 16:
 
| +--Flash: Alternate Vector Table || 0x000104 ||0x0001FF || 252
 
| +--Flash: Alternate Vector Table || 0x000104 ||0x0001FF || 252
 
|-valign="top"
 
|-valign="top"
| +--Flash: User Program || 0x000200 ||0x02ABFF || 170.5K
+
| +--Flash: User Program || 0x000200 ||0x0157FF || 85.5K
 
|-valign="top"
 
|-valign="top"
 
| Programming Executive || 0x800000 || 0x800FFF || 4K<sup>[1]</sup>
 
| Programming Executive || 0x800000 || 0x800FFF || 4K<sup>[1]</sup>
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| Config  Registers || 0xF80000 || 0xF80017 || 24
 
| Config  Registers || 0xF80000 || 0xF80017 || 24
 
|-valign="top"
 
|-valign="top"
| Device ID (0xF5) || 0xFF0000 || 0xFF0003 || 4
+
| Device ID (0xE5) || 0xFF0000 || 0xFF0003 || 4
 
|-
 
|-
 
|}
 
|}
[1] Each address is 16-bit wide. Every two addresses correspond to a 24-bit instruction. Each even address contains 2 valid bytes; each odd address contains 1 valid byte plus 1 fathom byte.<br>
+
[1] Each address is 16-bit wide. Every two addresses correspond to a 24-bit instruction. Each even address contains 2 valid bytes; each odd address contains 1 valid byte plus 1 phathom byte.<br>
  
  
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|-valign="top"
 
|-valign="top"
 
| _XDATA(N) <sup>[1]</sup>
 
| _XDATA(N) <sup>[1]</sup>
| RAM Data in X-memory, aligned at N, with initialization
+
| RAM Data in X-memory, aligned at N, with initilization
 
| int _XDATA(32) xbuf[] = {1, 2, 3, 4, 5};
 
| int _XDATA(32) xbuf[] = {1, 2, 3, 4, 5};
 
|-valign="top"
 
|-valign="top"
 
| _YBSS(N) <sup>[1]</sup>
 
| _YBSS(N) <sup>[1]</sup>
| RAM Data in Y-memory, aligned at N, no initialization
+
| RAM Data in Y-memory, aligned at N, no initilization
 
| int _YBSS(32) ybuf[16];
 
| int _YBSS(32) ybuf[16];
 
|-valign="top"
 
|-valign="top"
 
| _YDATA(N) <sup>[1]</sup>
 
| _YDATA(N) <sup>[1]</sup>
| RAM Data in Y-memory, aligned at N, with initialization
+
| RAM Data in Y-memory, aligned at N, with initilization
 
| int _YDATA(32) ybuf[16] = {1, 2, 3, 4, 5};
 
| int _YDATA(32) ybuf[16] = {1, 2, 3, 4, 5};
|-valign="top"
 
| __attribute__((space(dma))
 
| RAM Data in DMA
 
| int __attribute__((space(dma)) data[128];
 
 
|-valign="top"
 
|-valign="top"
 
| __attribute__((space(const)))
 
| __attribute__((space(const)))
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| Flash ROM data, read/write by (psv)
 
| Flash ROM data, read/write by (psv)
 
| int i __attribute__((space(psv)));
 
| int i __attribute__((space(psv)));
 +
|-valign="top"
 +
| _EEDATA(N) <sup>[1]</sup>
 +
| ROM Data in EEPROM, aligned at N, read/write with psv
 +
| int _EEDATA(2) table[]={0, 1, 2, 3, 5, 8};
 
|-valign="top"
 
|-valign="top"
 
| _PERSISTENT
 
| _PERSISTENT
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| Interrupt service rountine
 
| Interrupt service rountine
 
| void __attribute__((__interrupt__)) _INT0Interrupt(void);
 
| void __attribute__((__interrupt__)) _INT0Interrupt(void);
 +
|-valign="top"
 +
| _ISRFAST
 +
| Fast interrupt service rountine
 +
| void _ISRFAST _T0Interrupt(void);
 
|-
 
|-
 
|}
 
|}

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