Difference between revisions of "Minimig Board v1.0 schematic"
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(+Main power supply) |
(xilinx webpack ise supported devices) |
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[[Image:Minimig_v10_board_sd_card.png|thumb|right|250px|[[SD Card]] slot]] | [[Image:Minimig_v10_board_sd_card.png|thumb|right|250px|[[SD Card]] slot]] | ||
| − | [[Image:Minimig_v10_board_spare_io.png|thumb|right||Spare I/O directly connected to FPGA]] | + | [[Image:Minimig_v10_board_spare_io.png|thumb|right||Spare I/O directly connected to FPGA]]<br> |
| + | <br> | ||
| + | [http://www.xilinx.com/ise/products/webpack_config.htm Xilinx ISE Webpack device support]<br> | ||
Revision as of 04:01, 4 August 2007
Board schematic for Minimig board v1.0
Voltage level: (3.3V/(560ohm + 560ohm + 32ohm))*32 ohm*1000 = 91,7mV
Back EMF issues?
Head phones
Notice the resistor of 560 ohm. May cause inlinear output.
- in 15kHz mode:
- /VSYNC = high (scart RGB enable)
- /HSYNC = composite sync
FPGA Xilinx XC3S400-4PQ208C
FPGA core power +1,25V +2,5V using LM1117MP-ADJ
FPGA decoupling
MC68000 Decoupling
PATCH needed to get rev 1 board working:
- Disconnect net SPI_DOUT from pin 81 of FPGA.
- Connect net SPI_DOUT to pin 19 of FPGA (net USER3).
- REASON:
- Pin 81 is an output during FPGA config that blocks SPI to MMC during startup.
Asynchronous static ram 512 x 16 bit (2 chips)
SD Card slot
