JTAG

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Revision as of 13:52, 8 January 2008 by 87.218.86.129 (Talk)

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The Joint Test Action Group (JTAG) standardized a 5 pin boundary-scan test port as IEEE Std. 1149.1, "Standard Test Access Port and Boundary-Scan Architecture".

While originally intended for boundary-scan testing of PCB assemblies, to replace bed-of-nails testing, the JTAG port included in many popular microprocessors is also often used for programming and debugging.

"If you have information on how to connect a JTAG probe to a Nokia phone, please let me know."

There are five pins:

  • TCK/clock
  • TMS/mode select
  • TDI/data in
  • TDO/data out
  • TRST/reset (optional), when driven low, resets the internal state machine.

Except for TCK, all other JTAG lines should be pulled high via a resistor.


WARNING: unconfirmed pinout. Please add links to pinout standard.

20 Pin JTAG PinOut

Which one of these is right?

   Pin Function Pin Function
   1   TRST     2   GND
   3   TDO      4   GND
   5   TDI      6   GND
   7   TMS      8   GND
   9   TCK     10   GND
   11  VPP_E   12   GND
   13  A/W     14   GND
   15  User 0  16   GND
   17  Rdy/Bsy 18   GND
   19  User 1  20   Vcc
    1 +3.3 V    2 +3.3 V
    3 nTRST     4 GND
    5 TDI       6 GND
    7 TMS       8 GND
    9 TCK      10 GND
   11  --      12 GND
   13 TDO      14 GND
   15 nRST     16 GND
   17  --      18 GND
   19  --      20 GND 


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