JTAG

The Joint Test Action Group (JTAG) standardized a 5 signal boundary-scan test port as IEEE Std. 1149.1, "Standard Test Access Port and Boundary-Scan Architecture".

While originally intended for boundary-scan testing of PCB assemblies, to replace bed-of-nails testing, the JTAG port included in many popular microprocessors is also often used for programming and debugging.

"If you have information on how to connect a JTAG probe to a Nokia phone, please let me know."

There are five signals:
 * TCK/clock
 * TMS/mode select
 * TDI/data in
 * TDO/data out
 * TRST/reset (optional), when driven low, resets the internal state machine.

Except for TCK, all other JTAG lines should be pulled high via a resistor.

WARNING: unconfirmed pinout. Please add links to pinout standard.

20 Pin JTAG PinOut
1 +3.3 V   2 +3.3 V     3 nTRST     4 GND 5 TDI      6 GND 7 TMS      8 GND 9 TCK     10 GND 11 --      12 GND 13 TDO     14 GND 15 nRST    16 GND 17 --      18 GND 19 --      20 GND