- Gayle style IDE is very simple, i've been looking into it. though bluea would probably be the best person to ask about it, he has it working on natami i believe. Most of the signals come straight from the CPU, which means very few FPGA pins will be needed.
- from what i can see, the only lines that dont come straight from the CPU are.
- IDE_CS2 (usually only used by IDE doublers, can probably be left out)
- IDE_IRQ (not needed when interfacing drives to MCU's, not sure whether scsi.device needs it)
- what do you know... exactly 6 extra lines
- The data lines are byte swapped
- And IDE_A0 - IDE_A2 are mapped to A2 - A4
- finally, IDE_LED, optionally goes to an LED.
- an IDE only mode compact flash port, could easily be added to the bottom side of the board. :Giving us access to 1.8" hard drives.
freqmax: Internal P-ATA connector pinout
- out: CS1, CS2,IOWR, IORD
- in: IRQ,
- hmm? WAIT
S-ATA PHY IP-Core:
- UAE's Hardfile format. In addition to UAE's normal hardfile format (that works as a simplepartition) UAE also has the option of making an entire HD image, including RDB.
- Starting from kickstart 37.300 (I think it's Rom 2.05, earlier releases had a bug and didn't detect it) the controller is supported and code is built-in in the rom.
- For kickstart 1.3 I guess that a driver would be required, simulating an autoconfig HD controller or maybe it would be enough to extract the rom from KS and make a custom 1.3 rom... but I guess I could live without HD emulation on OS1.3 since OS 2.05/3.1 could be loaded in the same board with just a reset.
- I guess Gayle emulation would be perfect. Maybe Thomas Hirsch aka "bluea" could give some hints. He has implemented Gayle emulation for his NatAmi project. I don't know if he'll release some code. Anyway here you have some interesting info about Gayle:
- He got it working. According to him "I implemented the A4000 and A1200-Gayle registers as a Chip-Select logic for an 2.5" harddisk. So I can boot from that drive."
- -edit- BTW, if a 16 or 32MB memory chip was used there would be room to have 2MB of chip, 8MB of fast and also some "slow-ranger-pseudofast" ram. In addition to the FPGA code and AmigaOS Rom (the fpga code could be changed to accept 1MB roms like CD32/A1200) the rest of ram could be used as buffers for the hardfile. That way disk access shouldn't be too slow.
Re: Gayle IDE register offsets mail-archive.com mrmkl 070803: http://aminet.net/search?query=hddmem
P-ATA interface for the MC68000 cpu socket
amiga.org Largest Capacity Hard Drive In A600?
Software simulated hardfile with Gayle interface
Software hardfile support suggestion:
- Define "struct adfTYPE dh0;"
- Update User() to handle selection 'dh0' aswell. Current implementation decides you ALWAYS want 'df0'
- Make HandleFpgaCmd() to take more parameters and make them variable size per request.
- Modify ReadTrack() such that it doesn't presume 11 sectors per track.
- Make a SectorToFpga() function that don't stuff sector header formatting into the transfered sector.
- The rest is to make the FPGA to present the SPI transfered sectors to appear magicly from the Gayle ide controller via SPI.
Timating file access time of floppy disks, acm.org]
Addr on A1000+ Addr on AT Valid Data Read Function Write Function $0DA1018 3F6 8 bits Alternate Status Device Control $0DA101C 3F7 8 bits Drive address Not used $0DA0004 1F1 8 bits Error Register Features $0DA0008 1F2 8 bits Sector Count Sector Count $0DA000C 1F3 8 bits Sector Number Sector Number $0DA0010 1F4 8 bits Cylinder Low Cylinder Low $0DA0014 1F5 8 bits Cylinder High Cylinder High $0DA0018 1F6 8 bits Drive/Head Drive/Head $0DA001C 1F7 8 bits Status Command $0DA2000 1F0 16 bits Data Data
NetBSD Gayle matches watson.org arch/amiga/amiga/gayle.c
- define GAYLE_PHYS_ADDRESS 0xda8000