Minimig Board v1.0 schematic
Board schematic for Minimig board v1.0:
In 15kHz mode:
- /VSYNC = high (scart RGB enable)
- /HSYNC = composite sync
PATCH needed to get rev 1 board working:
- Disconnect net SPI_DOUT from pin 81 of FPGA.
- Connect net SPI_DOUT to pin 19 of FPGA (net USER3).
- REASON: Pin 81 is an output during FPGA config that blocks SPI to MMC during startup.